Duty cycle corrector
US8947143B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | May 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1565
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The duty cycle corrector for correcting a system clock signal comprises a duty cycle detector and a duty cycle adjuster. The duty cycle detector is configured for detecting a system duty cycle of the system clock signal and generating the first control signal and the second control signal, wherein the first control signal and the second control signal are complementary to each other. The duty cycle adjuster comprises an inverter and the duty cycle adjuster is configured for delaying a change in an input status of the inverter and adjusting of the inverter in accordance with the first control signal and the second control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.