Method and system for operating gallium nitride electronics
US8947154B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 3, 2013 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Oct 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An electronic circuit comprising a driver and a main transistor are provided. The driver may include a bias voltage generator, a supplementary transistor, and an output driver. The bias voltage generator may be configured to receive a voltage input and generate a biased voltage output based on the voltage input. The supplementary transistor may have a gate coupled to the biased voltage output of the bias voltage generator, and a source of the supplementary transistor providing a current to the bias voltage generator. The output driver may be configured to receive the biased voltage output from the bias voltage generator and the voltage input, receive the voltage input, and output a drive voltage. The main transistor of the electronic circuit may have a gate, a coupled to the drive voltage, and a drain coupled to a drain of the supplementary transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.