Hetero-switching layer in a RRAM device and method
US8947908B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 17, 2013 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Jun 17, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device structure includes first electrodes comprising conductive silicon-containing material, a plurality of resistive switching material stacks comprising first resistive switching material and second resistive switching material overlying the first electrode, wherein the first resistive switching material comprises a first resistance switching voltage and the second resistive switching material comprises a second resistance switching voltage less than the first amplitude, second electrodes comprising metal material overlying and electrically coupled to the plurality of resistive switching material stacks, wherein a plurality of memory elements are formed from the first plurality of electrodes, the plurality of resistive switching material stacks, and the second plurality of electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.