Methods of designing integrated circuits and systems thereof
US8949080B2 · kind B2 · utility
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5References
19Claims
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Key dates
| Filing date | Aug 25, 2010 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Oct 26, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of designing an integrated circuit includes performing a pre-layout simulation of the integrated circuit. The pre-layout simulation is performed using a netlist generated from a process design kit (PDK) file. The PDK file includes a plurality of device model cards that are assigned to plurality of devices. The plurality of devices include a first device having at least one parasitic diode that is associated with at least one isolation well, the PDK file including information of the at least one parasitic diode. A design layout of the integrated circuit corresponding to a result of the pre-layout simulation is generated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.