Inventor · San Jose, CA, US

Kuo-Tsai Li

3Patents
2h-index
5Co-inventors
33Inventor score

Filing activity: Oct 28, 2004 → Aug 25, 2010

Most-cited inventions

PatentTitleAreaCited byStatus
US7782073B2 High accuracy and universal on-chip switch matrix testline Electricity 7 Active
US7113018B2 High voltage tolerant I/O circuit using native NMOS transistor for improved performance Electricity 3 Expired
US8949080B2 Methods of designing integrated circuits and systems thereof Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.