Coherency controller and method for data hazard handling for copending data access requests
US8949547B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2011 |
| Grant date | Feb 3, 2015 |
| Priority date | — |
| Expiry date | Mar 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system that manages data hazards at a coherency controller and not at an initiator device is disclosed. Write requests are processed in a two part form, such that a first part is transmitted and when the coherency controller has space to accept data, the data and a state of the data prior to a write are sent as a second part of a write request. When there are copending reads and writes to the same address, writes are stalled by not responding to the first part of a write request and snoop requests received to the address are processed regardless of the fact that the write is pending. When the pending read has completed, the coherency controller will respond to the first part of the write request and the initiator device will complete the write by sending the data and a state indicator following the snoop.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.