FCOC (Flip Chip On Chip) package and manufacturing method thereof
US8951840B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 4, 2012 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | Dec 4, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method for Flip Chip on Chip (FCoC) package based on multi-row Quad Flat No-lead (QFN) package is provided wherein the lower surface of plate metallic base material are half-etched to form grooves. Insulation filling material is filled in the half-etched grooves. The upper surface of plate metallic base material is half-etched to form chip pad and multi-row of leads. Encapsulating first IC chip, second IC chip, solder bumps, underfill material, and metal wire to form an array of FCoC package based on the type of multi-row QFN package. Sawing and separating the FCoC package array, and forming FCoC package unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.