Contact elements of a semiconductor device formed by electroless plating and excess material removal with reduced sheer forces
US8951900B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 25, 2013 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | Aug 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76879
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure is directed to, among other things, an illustrative method that includes forming an opening in a dielectric material of a contact level of a semiconductor device, and selectively depositing a conductive material in the opening to form a contact element therein, the contact element extending to a contact area of a circuit element and having a laterally restricted excess portion formed outside of the opening and above the dielectric material. The disclosed method further includes forming a sacrificial material layer above the dielectric material and the contact element, the sacrificial material layer surrounding the laterally restricted excess portion. Additionally, the method includes planarizing a surface topography of the contact level in the presence of the sacrificial material so as to remove the laterally restricted excess portion from above the dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.