Stacked carbon-based FETs

US8952431B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Dechao Guo · Niskayuna, US
• Shu-Jen Han · Somers, US
• Yu Lu · Ridgefield, US
• Keith Kwong Hon Wong · Wappingers Falls, US

Key dates

• Filing date: May 9, 2013
• Grant date: Feb 10, 2015
• Expiry date: May 9, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/08

Abstract

Methods and systems for forming stacked transistors. Such methods include forming a lower channel layer on a substrate; forming a pair of vertically aligned gate regions over the lower channel layer; forming a pair of vertically aligned source regions and a pair of vertically aligned drain regions on the lower channel material, each pair separated by an insulator; forming an upper channel material over the source regions, drain regions, and gate regions; and providing electrical access to the source, drain, and gate regions.