Semiconductor transistor device with barrier interconnects
US8952535B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2013 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | Feb 7, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a first insulation film including a first opening reaching a diffusion region of a transistor; a first barrier metal over the diffused region in the first opening; a first conduction layer formed over the first barrier metal in the first opening and formed of a first conductor; a second barrier metal formed over the first conduction layer in the first opening; a second conduction layer formed over the second barrier metal in the first opening and formed of a second conductor; a third barrier metal formed over the first gate electrode in the second opening; a fourth barrier metal formed in the second opening and contacting with the third barrier metal; and a third conduction layer formed of the second conductor contacting with the fourth barrier metal in the second opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.