Operating a demultiplexer on an inter-integrated circuit (‘I2C’) bus
US8954634B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2012 |
| Grant date | Feb 10, 2015 |
| Priority date | — |
| Expiry date | Jun 26, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4291
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Operating a demultiplexer on an I2C bus, the demultiplexer including a set of input signal lines from an I2C master and a plurality of sets of output signal lines, the demultiplexer configured to couple the inputs among the output in dependence upon a demultiplexer select signal line that couples the demultiplexer to a rise time detection circuit, where the rise time detection circuit is also coupled to the input signal lines and the rise time detection circuit: monitors a voltage of at least one of the input signal lines, including: receiving, from the I2C master, a signal on one of the lines; and detecting rise time of the signal; and if the rise time of the signal is less than a predefined threshold, configuring the demultiplexer to vary the coupling of the input signal lines from a first set of outputs to a second set.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.