Techniques for phase tuning for process optimization
US8959465B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2011 |
| Grant date | Feb 17, 2015 |
| Priority date | — |
| Expiry date | Dec 30, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are provided for determining how thick or how deep to make the phased regions of a lithography mask. One example embodiment provides a method that includes: providing a first mask layout design including a first test set, and providing a second mask layout design including a second test set, wherein the second test set is larger than the first test set; simulating critical dimensions through focus of structures of interest in the first test set for a range of phase depths/thicknesses, and selecting an initial preferred mask phase depth/thickness based on results of the simulating; and generating a fast thick-mask model (FTM) at the initial preferred phase depth/thickness, and correcting the second test set of the second mask layout design using the FTM, thereby providing an optimized mask layout design. A mask having the optimized mask layout design may be implemented to give the optimum patterning.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.