Method of manufacturing magnetic tunnel junction memory element
US8962349B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2013 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Nov 25, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/01
Abstract
The present invention is directed to a method for fabricating a magnetic tunnel junction (MTJ) memory element. The method comprises the steps of providing a substrate having a contact dielectric layer, a bottom dielectric layer, a bottom electrode layer, an etch stop layer, an MTJ layer stack, and a top electrode layer sequentially formed thereon; etching the top electrode layer with a first mask thereon to form a top electrode; etching the MTJ layer stack with the top electrode thereon to form a patterned MTJ; encapsulating the patterned MTJ with a passivation layer; depositing a top dielectric layer on top of the passivation layer and planarizing the same layer; forming a second mask on the top dielectric layer; and etching the bottom electrode layer, the etch stop layer, the passivation layer, and the top dielectric layer with the second mask thereon to form a bottom electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.