Fabrication method of carrier-free semiconductor package
US8962396B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 2013 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Nov 21, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A carrier-free semiconductor package includes a circuit structure having an insulating layer and a circuit layer embedded in the insulating layer and having a plurality of conductive traces and RF (radio frequency) traces, a chip disposed on a first surface of the insulating layer and electrically connected to the conductive traces, an encapsulant covering the chip and the circuit layer, a ground layer formed on a second surface of the insulating layer opposite to the first surface, and a plurality of solder balls disposed on the conductive traces or terminals on the conductive traces, wherein portions of the solder balls electrically connect the ground layer so as to allow the RF traces and the ground layer to form a microstrip line having an RF function, thus obtaining a single-layer carrier-free semiconductor package having low cost and simplified RF design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.