One transistor and one resistive (1T1R) random access memory (RRAM) structure with dual spacers
US8963114B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 6, 2013 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | May 17, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
The present disclosure provides a resistive random access memory (RRAM) cells and methods of making the same. The RRAM cell includes a transistor and an RRAM structure. The RRAM structure includes a bottom electrode having a via portion and a top portion, a resistive material layer on the bottom electrode having a width that is same as a width of the top portion of the bottom electrode; a capping layer over the bottom electrode, a first spacer surrounding the capping layer and a top electrode, a second spacer surround the top portion of the bottom electrode and the first spacer, and the top electrode. The RRAM cell further includes a conductive material connecting the top electrode of the RRAM structure to a metal layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.