Imaging systems with per-column analog-to-digital converter non-linearity correction capabilities
US8963759B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 22, 2013 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Jun 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Electronic devices may include image sensors having image sensor pixels that are coupled to analog-to-digital converters (ADCs). Each ADC may be a sub-ranged ramp ADC that uses a first set of reference voltages to determine a coarse code and a second set of ramping voltages to determine a fine code. In the presence of parasitic capacitances, the reference voltages and the ramp voltages exhibit mismatch that causes the ADC to exhibit non-idealities such as missing codes. Calibration operations may be performed that involve obtaining a first code at a first predetermined input voltage level and obtaining a second code at a second predetermined input voltage level. A code correction value can then be computed based on the first and second codes. The code correction value can be selectively applied to the final ADC code to correct for missing codes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.