Patent · US Active

Defective memory column replacement with load isolation

US8964493B2 · kind B2 · utility

1Cited by

6References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Silke Penth · Holzgerlingen, DE
Raphael Polig · Dietikon, CH
Tobias Werner · Holzgerlingen, DE
Alexander Woerner · Eppelheim, DE

Key dates

Filing date	Jan 4, 2013
Grant date	Feb 24, 2015
Priority date	—
Expiry date	Mar 17, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/41
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Exemplary embodiments of the present invention disclose a method and system for substituting a group of memory cells for a defective group of memory cells in a memory. In a step, an exemplary embodiment replaces a signal path to a group of defective memory cells with a signal path to a redundant group of memory cells. In another step, an exemplary embodiment isolates the signal path to the redundant group of memory cells from a load imposed by the signal path to the replaced group of defective memory cells.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.