Patent · US Active

Architectural physical synthesis

US8966415B2 · kind B2 · utility

2Cited by

16References

24Claims

0Family size

Assignee

SYNOPSYS, INC. · US

Inventors

Kenneth S. McElvain · Los Altos, US
Benoit Lemonnier · Palo Alto, US
William Halpin · Palo Alto, US

Key dates

Filing date	Oct 25, 2013
Grant date	Feb 24, 2015
Priority date	—
Expiry date	Oct 25, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/12
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The present invention discloses methods and apparatuses to design an integrated circuit. According to one aspect, a method of designing an integrated circuit comprises determining a state of a design of the integrated circuit at a high level design representation of the integrated circuit, wherein the state of the design of the integrated circuit comprises a netlist with at least one of timing data, resource information, placement information, routing information, and power data. The method further comprises determining a first transform for the state, changing the state of the design at the high level design representation of the integrated circuit using the first transform, and determining a second transform based on the changed state.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.