Synchronising groups of threads with dedicated hardware logic
US8966488B2 · kind B2 · utility
5Cited by
6References
57Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 6, 2007 |
| Grant date | Feb 24, 2015 |
| Priority date | — |
| Expiry date | Jan 29, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3851
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention provides a processor comprising an execution unit arranged to execute multiple program threads, each thread comprising a sequence of instructions, and a plurality of synchronisers for synchronising threads. Each synchroniser is operable, in response to execution by the execution unit of one or more synchroniser association instructions, to associate with a group of at least two threads. Each synchroniser is also operable, when thus associated, to synchronise the threads of the group by pausing execution of a thread in the group pending a synchronisation point in another thread of that group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.