Apparatus and methods for hardware-efficient unbiased rounding
US8972472B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2008 |
| Grant date | Mar 3, 2015 |
| Priority date | — |
| Expiry date | Oct 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49963
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for unbiased rounding away from, or toward, zero by truncating N bits from a M bit input number to provide a M−N bit number, and adding the equivalent value of ‘½’ to the M−N bit number unless the input number is negative, or positive, respectively, and the N truncated bits represent exactly ½. The method for rounding away from zero may include outputting a (M−N) bit truncated number if the M-bit input number is negative and the sequence of N truncated bits comprises a most significant bit of 1, followed by zeros; and otherwise, computing and outputting a sum of (a) a number that has an equivalent value of one followed by (N−1) replicas of zero, the one provided by applying a logical operation on the most significant bit of the sequence of truncated bits and (b) the (M−N) bit truncated number.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.