Encoding and decoding of information using a block code matrix
US8972833B1 · kind B1 · utility
6Cited by
20References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2012 |
| Grant date | Mar 3, 2015 |
| Priority date | — |
| Expiry date | Jan 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/19
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An embodiment of an apparatus for encoding. For this embodiment of the apparatus, an encoder block is coupled to receive input data. The encoder block has an R-matrix block. The R-matrix block is configured to: exclusively OR combinations of subsets of data bits of the input data to generate (n−1) parity bits for n a positive integer greater than zero; and exclusively OR a combination of all of the data bits and all the (n−1) parity bits to generate an (n) parity bit 9-to-7.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.