Electrically rewriteable nonvolatile semiconductor memory device
US8976597B2 · kind B2 · utility
8Cited by
8References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 7, 2011 |
| Grant date | Mar 10, 2015 |
| Priority date | — |
| Expiry date | Jul 28, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/345
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A control circuit executes an erase operation that includes an erase pulse application operation and an erase verify operation. The erase pulse application operation applies an erase pulse voltage to a memory cell to change the memory cell from a write state to an erase state. The erase verify operation applies an erase verify voltage to the memory cell to judge whether the memory cell is in the erase state or not. The control circuit changes conditions of execution of the erase verify operation when the number of times of executions of the erase pulse application operation in one erase operation reaches a first number.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.