Semiconductor device having low resistivity region under isolation layer
US8981480B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 12, 2011 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | May 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a buried well, first and second active regions, an isolation layer, and a low resistance region. The buried well is disposed on a substrate and has impurity ions of a first conductivity type. The first and second active regions are disposed on the buried well and each have impurity ions of a second conductivity type, which is different from the first conductivity type. The isolation layer is disposed between the first and second active regions. The low resistance region is disposed between the isolation layer and the substrate and has impurity ions of the second conductivity type. The concentration of impurity ions in the low resistance region is greater than the concentration of the impurity ions in each of the first and second active regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.