Advanced coarse-grained cache power management
US8984227B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2013 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Sep 7, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and apparatuses for reducing power consumption of a system cache within a memory controller. The system cache includes multiple ways, and each way is powered independently of the other ways. A target active way count is maintained and the system cache attempts to keep the number of currently active ways equal to the target active way count. The bandwidth and allocation intention of the system cache is monitored. Based on these characteristics, the system cache adjusts the target active way count up or down, which then causes the number of currently active ways to rise or fall in response to the adjustment to the target active way count.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.