Store data forwarding with no memory model restrictions
US8984261B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2013 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Oct 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3834
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments relate to loading data in a pipelined microprocessor. An aspect includes issuing a load request that comprises a load address requiring at least one block of data the same size as a largest contiguous granularity of data returned from a cache. Another aspect includes determining that the load address matches at least one block address. Another aspect includes, based on determining that there is an address match, reading a data block from a buffer register and sending the data to satisfy the load request; comparing a unique set id of the data block to the set id of the matching address after sending the data block; based on determining that there is a set id match, continuing the load request, or, based on determining that there is not a set id match, setting a store-forwarding state of the matching address to no store-forwarding and rejecting the load request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.