Test system which shares a register in different modes
US8984354B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2012 |
| Grant date | Mar 17, 2015 |
| Priority date | — |
| Expiry date | Mar 23, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0405
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A test system, comprising: a BIST circuit for generating a first signal; a storage apparatus, for storing the first signal to generate a second signal; a first logic circuit, for generating a third signal; a second logic circuit; a register; and a passby circuit. In a first mode, the BIST circuit transmits the first signal to the storage device, the storage device outputs the second signal to the register for registering, and then the register outputs the registered second signal to the BIST circuit to test the storage apparatus. In a second mode, the first logic circuit transmits a third signal to the register for registering, and then the register outputs the registered third signal to the second logic circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.