Reliable interconnect for semiconductor device
US8987134B2 · kind B2 · utility
4Cited by
3References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2013 |
| Grant date | Mar 24, 2015 |
| Priority date | — |
| Expiry date | Jun 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices and methods of making thereof are disclosed. The semiconductor device includes a substrate prepared with a first dielectric layer formed thereon. The dielectric layer includes at least first, second and third contact regions. A second dielectric layer is disposed over the first dielectric layer. The device also includes at least first, second and third via contacts disposed in the second dielectric layer. The via contacts are coupled to the respective underlying contact regions and the via contacts do not extend beyond the underlying contact regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.