Integrated MOS power transistor with thin gate oxide and low gate charge
US8987818B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2011 |
| Grant date | Mar 24, 2015 |
| Priority date | — |
| Expiry date | Jan 4, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/111
Abstract
A split gate power transistor includes a laterally configured power MOSFET including a doped silicon substrate, a gate oxide layer formed on a surface of the substrate, and a split polysilicon layer formed over the gate oxide layer. The polysilicon layer is cut into two electrically isolated portions, a first portion forming a polysilicon gate positioned over a channel region of the substrate, and a second portion forming a polysilicon field plate formed over a portion of a transition region of the substrate. The two polysilicon portions are separated by a gap. A lightly doped region is implanted in the substrate below the gap, thereby forming a bridge having the same doping type as the substrate body. The field plate also extends over a field oxide filled trench formed in the substrate. The field plate is electrically coupled to a source of the split gate power transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.