Integrated circuit devices including through-silicon-vias having integral contact pads
US8987869B2 · kind B2 · utility
3Cited by
0References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 10, 2013 |
| Grant date | Mar 24, 2015 |
| Priority date | — |
| Expiry date | Jan 25, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device including an interlayer insulating layer on a substrate, a wire layer on the interlayer insulating layer, and a through-silicon-via (TSV) contact pattern having an end contacting the wire layer and integrally extending from inside of a via hole formed through the interlayer insulating layer and the substrate to outside of the via hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.