Cache memory bank selection
US8990505B1 · kind B1 · utility
41Cited by
7References
34Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2008 |
| Grant date | Mar 24, 2015 |
| Priority date | — |
| Expiry date | Jan 23, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Devices, systems, methods, and other embodiments associated with a cache memory are described. In one embodiment, a cache tag array includes tag banks. The cache memory further includes a bank selector configured to receive an address and to apply a hash function that maps the address to one of the tag banks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.