Performance enhancement of active device through reducing parasitic conduction
US8994114B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 13, 2013 |
| Grant date | Mar 31, 2015 |
| Priority date | — |
| Expiry date | Nov 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
An apparatus having an active device, a plurality of traces and one or more areas is disclosed. The active device may have a channel layer. A buffer layer is generally disposed between the channel layer and a substrate. A parasitic layer may be formed at an interface between the buffer layer and the substrate. The traces may be connected to the active device. The areas are generally proximate at least one of (i) the active device and (ii) at least two of the traces from which the parasitic layer is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.