Patent · US Active

Integrated circuits and methods for monitoring forward and reverse back biasing

US8994446B2 · kind B2 · utility

2Cited by
7References
20Claims
0Family size

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Inventors

Key dates

Filing dateJun 28, 2013
Grant dateMar 31, 2015
Priority date
Expiry dateJul 20, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG05F3/205
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

An integrated circuit includes a device of a first conductivity type formed in a first well; a voltage regulator configured to provide a bias voltage to the first well based on a first reference voltage which is generated using a first band gap reference generator; and a monitor circuit configured to compare a voltage of the first well to an upper limit and a lower limit of a first voltage range, wherein each of the upper limit and lower limit is provided using a second band gap reference generator, separate from the first band gap reference generator, wherein, in response to determining that the voltage of the first well is outside of the first voltage range, providing a first out of range indicator.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.