Method of fabricating III-nitride based semiconductor on partial isolated silicon substrate
US8999849B1 · kind B1 · utility
7Cited by
6References
10Claims
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Key dates
| Filing date | Dec 2, 2013 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Dec 27, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A semiconductor is fabricated on a silicon (Si) substrate. The semiconductor is III-nitride based. The Si substrate is partially isolated. Etching is directly processed from top on a chip for solving wire-width problem. The Si substrate does not need to be made thin. The chip can be large scaled and be prevented from bowing. Thus, the present invention simplifies producing procedure and reduces production cost. Besides, for a large-scaled chip, the breakdown voltage is enhanced; and, without making the Si substrate thin, the on-state current is remained the same and the heat problem is weakened.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.