Patent · US Active

On-chip probe circuit for detecting faults in an FPGA

US9000807B2 · kind B2 · utility

2Cited by

10References

9Claims

0Family size

Assignee

Microsemi SoC Corp. · US

Inventors

Jonathan W. Greene · Palo Alto, US
Dirk Kannemacher · Wunstorf, DE
Volker Hecht · Barsinghausen, DE
Theodore Speers · San Jose, US

Key dates

Filing date	Jul 2, 2013
Grant date	Apr 7, 2015
Priority date	—
Expiry date	Jul 2, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/00
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

An integrated circuit includes a clock input, a first output, and a second output. A programmable pulse generator has a programmable pulse counter coupled to the clock input at least one control input for receiving count information. A fixed delay element is coupled to the programmable pulse counter. A programmable delay element is coupled to the programmable pulse counter and has at least one control input for receiving delay information. A first multiplexer is coupled to the fixed delay element, the programmable delay element and to the first output. A second multiplexer is coupled to the programmable delay element, the output of the fixed delay element and the second output.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.