Master slave interface
US9001952B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 26, 2012 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Mar 26, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Implementations related to systems, devices, and methods that make use of a master slave arrangement are described. In one implementation, a method of reducing overall power consumption in a master-slave system includes generating a clock signal in a master device having a first power consumption rate, transmitting the clock signal from the master device to a slave device having a second power consumption rate, the first power consumption rate is lower than the second power consumption rate, sampling data receive by the slave device, the data being provided by the master device, generating phase error information of the clock signal in the slave device, transmitting the phase error information from the slave device to the master device, and adjusting the clock signal in response to the phase error information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.