Lumped aggressor model for signal integrity timing analysis
US9003342B1 · kind B1 · utility
6Cited by
2References
18Claims
0Family size
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Key dates
| Filing date | Mar 31, 2014 |
| Grant date | Apr 7, 2015 |
| Priority date | — |
| Expiry date | Mar 31, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A lumped aggressor model is used to simulate multiple aggressor nets acting on a victim net. By lumping the aggressor nets together into a single input port, a single voltage excitation may be applied to the input port to simulate the model during static timing analysis. However, a record of each individual aggressor net and several associated attributes for each aggressor net is maintained such that the individual lumped aggressor nets may still be modeled as separate contributions to the attack on the victim net.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.