Igor Keller
42Patents
12h-index
46Co-inventors
77Inventor score
Filing activity: Aug 19, 2003 → Apr 4, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7359843B1 | Robust calculation of crosstalk delay change in integrated circuit design | Physics | 211 | Expired |
| US7562323B1 | System, method and computer program product for handling small aggressors in signal integrity analysis | Physics | 199 | Active |
| US7761826B1 | Method and system for crosstalk analysis | Physics | 56 | Active |
| US7882471B1 | Timing and signal integrity analysis of integrated circuits with semiconductor process variations | Physics | 42 | Active |
| US8245165B1 | Methods and apparatus for waveform based variational static timing analysis | Physics | 25 | Active |
| US8595669B1 | Flexible noise and delay modeling of circuit stages for static timing analysis of integrated circuit designs | Physics | 25 | Active |
| US8543954B1 | Concurrent noise and delay modeling of circuit stages for static timing analysis of integrated circuit designs | Physics | 17 | Active |
| US8601420B1 | Equivalent waveform model for static timing analysis of integrated circuit designs | Physics | 17 | Active |
| US8302046B1 | Compact modeling of circuit stages for static timing analysis of integrated circuit designs | Physics | 14 | Active |
| US8104006B2 | Method and apparatus for thermal analysis | Physics | 12 | Active |
| US8516420B1 | Sensitivity and static timing analysis for integrated circuit designs using a multi-CCC current source model | Physics | 12 | Active |
| US8341572B1 | Methods and apparatus for waveform based variational static timing analysis | Physics | 12 | Active |
| US9129078B1 | Static timing analysis of integrated circuit designs with flexible noise and delay models of circuit stages | Physics | 11 | Active |
| US8615725B1 | Methods for compact modeling of circuit stages for static timing analysis of integrated circuit designs | Physics | 10 | Active |
| US8938703B1 | Method and apparatus for comprehension of common path pessimism during timing model extraction | Physics | 9 | Active |
| US8924905B1 | Constructing equivalent waveform models for static timing analysis of integrated circuit designs | Physics | 9 | Active |
| US10185795B1 | Systems and methods for statistical static timing analysis | Physics | 8 | Active |
| US9881123B1 | Method and system for timing analysis with adaptive timing window optimization for determining signal integrity impact | Physics | 8 | Active |
| US8966421B1 | Static timing analysis methods for integrated circuit designs using a multi-CCC current source model | Physics | 8 | Active |
| US8631369B1 | Methods, systems, and apparatus for timing and signal integrity analysis of integrated circuits with semiconductor process variations | Physics | 8 | Active |
| US9384310B1 | View data sharing for efficient multi-mode multi-corner timing analysis | Physics | 7 | Active |
| US7464349B1 | Method and system or generating a current source model of a gate | Physics | 7 | Active |
| US9710593B1 | Methods, systems, and articles of manufacture for enhancing timing analyses with reduced timing libraries for electronic designs | Physics | 7 | Active |
| US8375343B1 | Methods and apparatus for waveform based variational static timing analysis | Physics | 6 | Active |
| US8782583B1 | Waveform based variational static timing analysis | Physics | 6 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.