Fabrication method of phase change memory device having self-aligned bottom electrode
US9006073B2 · kind B2 · utility
1Cited by
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6Claims
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Key dates
| Filing date | May 2, 2014 |
| Grant date | Apr 14, 2015 |
| Priority date | — |
| Expiry date | May 2, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/841
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device and a fabrication method thereof capable of improving electric contact characteristic between an access device and a lower electrode are provided. The semiconductor memory device includes an access device formed in a pillar shape on a semiconductor substrate, a first conductive layer formed over the access device, a protection layer formed on an edge of the first conductive layer to a predetermined thickness, and a lower electrode connected to the first conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.