Disparity reduction for high speed serial links
US9007240B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 18, 2013 |
| Grant date | Apr 14, 2015 |
| Priority date | — |
| Expiry date | Jun 22, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/1507
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
System, computer program product, and computer-implemented method to improve a running disparity of an encoded bit stream in a distributed network switch, the distributed network switch comprising a plurality of switch modules including a first switch module, by receiving, at the first switch module, a raw data stream comprising a plurality of bits, receiving a bit sequence, encoding at least a first bit of the raw data stream using a corresponding at least a first bit of the bit sequence, transmitting the encoded first bit, inverting the first bit of the bit sequence, and encoding a second bit of the raw data stream using the inverted first bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.