Estimating transistor characteristics and tolerances for compact modeling
US9009638B1 · kind B1 · utility
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4References
13Claims
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Key dates
| Filing date | Dec 30, 2013 |
| Grant date | Apr 14, 2015 |
| Priority date | — |
| Expiry date | Dec 30, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for generating compact models that include the effects of physical and electrical variations independent of available hardware data. A method includes generating a physics-based model using a technology computer-aided design (TCAD) of the one or more devices in a technology node. The method further includes deriving electrical parameters for the one or more devices from the physics-based model. The method further includes generating the compact model based on the derived electrical parameters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.