Circuits with linear finfet structures
US9009641B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 2013 |
| Grant date | Apr 14, 2015 |
| Priority date | — |
| Expiry date | Jan 12, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A first transistor has source and drain regions within a first diffusion fin. The first diffusion fin projects from a surface of a substrate. The first diffusion fin extends lengthwise in a first direction from a first end to a second end of the first diffusion fin. A second transistor has source and drain regions within a second diffusion fin. The second diffusion fin projects from the surface of the substrate. The second diffusion fin extends lengthwise in the first direction from a first end to a second end of the second diffusion fin. The second diffusion fin is positioned next to and spaced apart from the first diffusion fin. Either the first end or the second end of the second diffusion fin is positioned in the first direction between the first end and the second end of the first diffusion fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.