Gate depletion drain extended MOS transistor
US9012998B2 · kind B2 · utility
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3Claims
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Key dates
| Filing date | Jul 16, 2014 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Jul 16, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A drain extended MOS transistor configured to operate in a gate-depletion regime. Devices comprising such transistors are described together with fabrication processes for such devices and transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.