David Vigar
10Patents
5h-index
14Co-inventors
59Inventor score
Filing activity: Jun 11, 2003 → Jul 16, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6927104B2 | Method of forming double-gated silicon-on-insulator (SOI) transistors with corner rounding | Electricity | 19 | Expired |
| US7089522B2 | Device, design and method for a slot in a conductive area | Electricity | 19 | Expired |
| US6835609B1 | Method of forming double-gate semiconductor-on-insulator (SOI) transistors | Electricity | 16 | Expired |
| US7314811B2 | Method to make corner cross-grid structures in copper metallization | Emerging Cross-Sectional Technologies | 12 | Expired |
| US6787404B1 | Method of forming double-gated silicon-on-insulator (SOI) transistors with reduced gate to source-drain overlap capacitance | Electricity | 6 | Expired |
| US7141854B2 | Double-gated silicon-on-insulator (SOI) transistors with corner rounding | Electricity | 5 | Expired |
| US8658524B2 | On-gate contacts in a MOS device | Electricity | 3 | Active |
| US9318378B2 | Slot designs in wide metal lines | Electricity | 1 | Active |
| US9012998B2 | Gate depletion drain extended MOS transistor | Electricity | 0 | Active |
| US8816441B2 | Gate depletion drain extended MOS transistor | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.