Semiconductor device and operating method thereof
US9013924B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 15, 2012 |
| Grant date | Apr 21, 2015 |
| Priority date | — |
| Expiry date | Sep 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An operating method of a semiconductor device includes precharging bit lines corresponding to selected memory cells, supplying a first verify voltage to a word line coupled to the selected memory cells and outputting programming states of the selected memory cells to the bit lines during a first time period, sensing potentials of the bit lines that have the programming states of the selected memory cells outputted to the bit lines during the first time period, supplying a first target voltage higher than the first verify voltage to the word line and outputting programming states of the selected memory cells to the bit lines during a second time period shorter than the first time period, and sensing potentials of the bit lines that have the programming states of the selected memory cells outputted to the bit lines during the second time period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.