Standard wafer and its fabrication method
US9019152B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2013 |
| Grant date | Apr 28, 2015 |
| Priority date | — |
| Expiry date | Feb 1, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02521
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A standard wafer is provided including a substrate; a first layer of semiconductor material formed on the substrate; a bar formed over the first layer of semiconductor material with an interlayer interposed therebetween; and a first sidewall spacer and a second sidewall spacer formed on the opposite sides of the bar respectively, in which the bar and the first layer of semiconductor material are formed of a same semiconductor material, and the interlayer interposed between the first layer of semiconductor material and the bar is formed of a first oxide, and the first sidewall spacer and the second sidewall spacer are formed of a second oxide. A corresponding fabrication method of the standard wafer is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.