Increased deposition efficiency and higher chamber conductance with source power increase in an inductively coupled plasma (ICP) chamber

US9023227B2 · kind B2 · utility

Assignee

• Applied Materials, Inc. · US

Inventors

• Jivko Dinev · Santa Clara, US
• Saravjeet Singh · Sunnyvale, US
• Khalid Mohiuddin Sirajuddin · San Jose, US
• Tong Liu · San Diego, US
• Puneet Bajaj · Savanuru, IN
• Rohit Mishra · Santa Clara, US
• Sonal A. Srivastava · Fremont, US
• Madhava Rao Yalamanchili · معلمی نژاد, US
• Ajay Kumar · Fairport, US

Key dates

• Filing date: May 25, 2012
• Grant date: May 5, 2015
• Expiry date: Sep 1, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76898
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).