Patent · US Active

Semiconductor-on-insulator with back side heat dissipation

US9029201B2 · kind B2 · utility

10Cited by

32References

22Claims

0Family size

Assignee

Silanna Semiconductor U.S.A., Inc. · US

Inventors

Paul A. Nygaard · Carlsbad, US
Stuart B. Molin · Carlsbad, US
Michael A. Stuber · Carlsbad, US

Key dates

Filing date	Jul 14, 2010
Grant date	May 12, 2015
Priority date	—
Expiry date	Feb 24, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/3511
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

Embodiments of the present invention provide for the dissipation of heat from semiconductor-on-insulator (SOI) structures. In one embodiment, a method for fabricating an integrated circuit is disclosed. In a first step, active circuitry is formed in an active layer of a SOI wafer. In a second step, substrate material is removed from a substrate layer disposed on a back side of the SOI wafer. In a third step, insulator material is removed from the back side of the SOI wafer to form an excavated insulator region. In a fourth step, a thermal dissipation layer is deposited on said excavated insulator region. The thermal dissipation layer is thermally conductive and electrically insulating.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.