Inventor · Carlsbad, CA, US

Stuart B. Molin

85Patents
11h-index
23Co-inventors
78Inventor score

Filing activity: Dec 8, 1992 → May 7, 2024

Most-cited inventions

PatentTitleAreaCited byStatus
US8466036B2 Trap rich layer for semiconductor devices Electricity 109 Active
US9466536B2 Semiconductor-on-insulator integrated circuit with back side gate Electricity 22 Active
US9530796B2 Semiconductor-on-insulator integrated circuit with interconnect below the insulator Electricity 21 Active
US8426888B2 Vertical semiconductor device with thinned substrate Electricity 21 Active
US9159825B2 Double-sided vertical semiconductor device with thinned substrate Electricity 18 Active
US9331098B2 Semiconductor-on-insulator integrated circuit with reduced off-state capacitance Electricity 13 Active
US8536021B2 Trap rich layer formation techniques for semiconductor devices Electricity 13 Active
US8859347B2 Semiconductor-on-insulator with back side body connection Electricity 12 Active
US8466054B2 Thermal conduction paths for semiconductor structures Electricity 12 Active
US8497670B1 Charge pump regulator circuit for powering a variable load Electricity 12 Active
US8748245B1 Semiconductor-on-insulator integrated circuit with interconnect below the insulator Electricity 12 Active
US9257834B1 Single-laminate galvanic isolator assemblies Electricity 11 Active
US8232597B2 Semiconductor-on-insulator with back side connection Electricity 11 Active
US8357975B2 Semiconductor-on-insulator with back side connection Electricity 10 Active
US11245247B2 Pulsed laser diode driver Electricity 10 Active
US9029201B2 Semiconductor-on-insulator with back side heat dissipation Electricity 10 Active
US8912646B2 Integrated circuit assembly and method of making Electricity 9 Active
US9034732B2 Semiconductor-on-insulator with back side support layer Electricity 8 Active
US8928068B2 Vertical semiconductor device with thinned substrate Electricity 8 Active
US8921168B2 Thin integrated circuit chip-on-board assembly and method of making Electricity 8 Active
US8835281B2 Methods for the formation of a trap rich layer Electricity 8 Active
US9064697B2 Trap rich layer formation techniques for semiconductor devices Electricity 8 Active
US8426258B2 Vertical semiconductor device with thinned substrate Electricity 7 Active
US6052003A CMOS delay circuit Electricity 7 Expired
US5554950A Delay line providing an adjustable delay in response to binary input signals Electricity 7 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.