Semiconductor device and method of manufacturing the same
US9029237B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2013 |
| Grant date | May 12, 2015 |
| Priority date | — |
| Expiry date | Nov 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To provide a semiconductor device provided with an element isolation structure capable of hindering an adverse effect on electric characteristics of a semiconductor element, and a method of manufacturing the same. The thickness of a first silicon oxide film left in a shallow trench isolation having a relatively narrow width is thinner than the first silicon oxide film left in a shallow trench isolation having a relatively wide width. A second silicon oxide film (an upper layer) having a relatively high compressive stress by an HDP-CVD method is more thickly laminated over the first silicon oxide film in a lower layer by a thinned thickness of the first silicon oxide film. The compressive stress of an element isolation oxide film finally formed in a shallow trench isolation having a relatively narrow width is more enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.