Phase-change memory devices including thermally-isolated phase-change layers and methods of fabricating the same
US9029828B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 30, 2013 |
| Grant date | May 12, 2015 |
| Priority date | — |
| Expiry date | Oct 30, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
Abstract
Provided are a phase-change memory device and a method of fabricating the same. The device may include memory cells provided at intersections of word lines and bit lines that extend along first and second directions crossing each other, and a mold layer including thermal insulating regions, such as air gaps, that may be provided between the memory cells to separate the memory cells from each other. Each of the memory cells may include a lower electrode electrically connected to the word line to have a first width in the first direction, an upper electrode electrically connected to the bit line to have a second width greater than the first width in the first direction, and a phase-change layer provided between the lower and upper electrodes to have the first width in the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.